Bias circuit for high efficiency complimentary metal oxide semiconductor (CMOS) power amplifiers

Bias circuit for high efficiency complimentary metal oxide semiconductor (CMOS) power amplifiers

Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement.

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Bibliographische Detailangaben
Hauptverfasser: Esmael, Mohamed Moussa Ramadan, Abdalla, Mohamed Ahmed Youssef
Format: Patent
Sprache:eng
Schlagworte:
AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
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Beschreibung
Zusammenfassung:Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement.