High voltage tolerant CMOS driver for low-voltage bi-directional communication buses

A bi-state driver circuit for switching an output terminal between a first predetermined voltage level and a high impedance state, which involves a first string of transistors connected between the output terminal and the first predetermined voltage level at least a first transistor arranged closer to the first predetermined voltage level, a second transistor arranged closer to the output terminal, a voltage divider circuit connected between the output terminal and a voltage level of a control signal attaining voltage levels between the first predetermined voltage level and a second predetermined voltage level, including at least one intermediate node having an intermediate voltage level between a voltage level of the output terminal and the voltage level of the control signal, and a second string of transistors connected between the intermediate node of the voltage divider circuit and the second predetermined voltage level, and including at least a third transistor.