Thin film transistor array panel
A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Joo, Young Cheol Moon, Ji Young Kim, Jong Woo Cho, Yoon Hyeung Park, Eun-Kil Lee, Seung Jae Ha, Jae Heung Kim, Hyeong Joon Han, Sang Jin Oh, Min Ho |
| description | A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10629624B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10629624B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10629624B23</originalsourceid><addsrcrecordid>eNrjZFAIycjMU0jLzMlVKClKzCvOLC7JL1JILCpKrFQoSMxLzeFhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYYGZkaWZkYmTkbGxKgBAFv6JXo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Thin film transistor array panel</title><source>esp@cenet</source><creator>Joo, Young Cheol ; Moon, Ji Young ; Kim, Jong Woo ; Cho, Yoon Hyeung ; Park, Eun-Kil ; Lee, Seung Jae ; Ha, Jae Heung ; Kim, Hyeong Joon ; Han, Sang Jin ; Oh, Min Ho</creator><creatorcontrib>Joo, Young Cheol ; Moon, Ji Young ; Kim, Jong Woo ; Cho, Yoon Hyeung ; Park, Eun-Kil ; Lee, Seung Jae ; Ha, Jae Heung ; Kim, Hyeong Joon ; Han, Sang Jin ; Oh, Min Ho</creatorcontrib><description>A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200421&DB=EPODOC&CC=US&NR=10629624B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200421&DB=EPODOC&CC=US&NR=10629624B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Joo, Young Cheol</creatorcontrib><creatorcontrib>Moon, Ji Young</creatorcontrib><creatorcontrib>Kim, Jong Woo</creatorcontrib><creatorcontrib>Cho, Yoon Hyeung</creatorcontrib><creatorcontrib>Park, Eun-Kil</creatorcontrib><creatorcontrib>Lee, Seung Jae</creatorcontrib><creatorcontrib>Ha, Jae Heung</creatorcontrib><creatorcontrib>Kim, Hyeong Joon</creatorcontrib><creatorcontrib>Han, Sang Jin</creatorcontrib><creatorcontrib>Oh, Min Ho</creatorcontrib><title>Thin film transistor array panel</title><description>A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAIycjMU0jLzMlVKClKzCvOLC7JL1JILCpKrFQoSMxLzeFhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYYGZkaWZkYmTkbGxKgBAFv6JXo</recordid><startdate>20200421</startdate><enddate>20200421</enddate><creator>Joo, Young Cheol</creator><creator>Moon, Ji Young</creator><creator>Kim, Jong Woo</creator><creator>Cho, Yoon Hyeung</creator><creator>Park, Eun-Kil</creator><creator>Lee, Seung Jae</creator><creator>Ha, Jae Heung</creator><creator>Kim, Hyeong Joon</creator><creator>Han, Sang Jin</creator><creator>Oh, Min Ho</creator><scope>EVB</scope></search><sort><creationdate>20200421</creationdate><title>Thin film transistor array panel</title><author>Joo, Young Cheol ; Moon, Ji Young ; Kim, Jong Woo ; Cho, Yoon Hyeung ; Park, Eun-Kil ; Lee, Seung Jae ; Ha, Jae Heung ; Kim, Hyeong Joon ; Han, Sang Jin ; Oh, Min Ho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10629624B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Joo, Young Cheol</creatorcontrib><creatorcontrib>Moon, Ji Young</creatorcontrib><creatorcontrib>Kim, Jong Woo</creatorcontrib><creatorcontrib>Cho, Yoon Hyeung</creatorcontrib><creatorcontrib>Park, Eun-Kil</creatorcontrib><creatorcontrib>Lee, Seung Jae</creatorcontrib><creatorcontrib>Ha, Jae Heung</creatorcontrib><creatorcontrib>Kim, Hyeong Joon</creatorcontrib><creatorcontrib>Han, Sang Jin</creatorcontrib><creatorcontrib>Oh, Min Ho</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Joo, Young Cheol</au><au>Moon, Ji Young</au><au>Kim, Jong Woo</au><au>Cho, Yoon Hyeung</au><au>Park, Eun-Kil</au><au>Lee, Seung Jae</au><au>Ha, Jae Heung</au><au>Kim, Hyeong Joon</au><au>Han, Sang Jin</au><au>Oh, Min Ho</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Thin film transistor array panel</title><date>2020-04-21</date><risdate>2020</risdate><abstract>A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US10629624B2 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Thin film transistor array panel |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T07%3A59%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Joo,%20Young%20Cheol&rft.date=2020-04-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10629624B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |