Memory device, host device, and memory system

A control circuit causes a first cryptographic module to perform a dummy operation in a command processing period and a data processing period in which a second cryptographic module performs a normal operation while the first cryptographic module does not perform a normal operation.

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Bibliographische Detailangaben
Hauptverfasser: Yutani, Hiromu, Sugahara, Takahiko
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A control circuit causes a first cryptographic module to perform a dummy operation in a command processing period and a data processing period in which a second cryptographic module performs a normal operation while the first cryptographic module does not perform a normal operation.