Semiconductor package having junction cooling pipes embedded in substrates
Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the s...
Gespeichert in:
Hauptverfasser: | , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Lee, Byoungok Im, Seungwon Lee, Yoonsoo Son, Joonseo Jeon, Oseob Park, Changyoung Lee, Dukyong |
description | Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10607919B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10607919B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10607919B23</originalsourceid><addsrcrecordid>eNrjZPAKTs3NTM7PSylNLskvUihITM5OTE9VyEgsy8xLV8gqzUsuyczPU0jOz88BCRRkFqQWK6TmJqWmpKSmKGTmKRSXJhWXFCWWpBbzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjUYqDRqXmpJfGhwYYGZgbmloaWTkbGxKgBAHE_NdY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor package having junction cooling pipes embedded in substrates</title><source>esp@cenet</source><creator>Lee, Byoungok ; Im, Seungwon ; Lee, Yoonsoo ; Son, Joonseo ; Jeon, Oseob ; Park, Changyoung ; Lee, Dukyong</creator><creatorcontrib>Lee, Byoungok ; Im, Seungwon ; Lee, Yoonsoo ; Son, Joonseo ; Jeon, Oseob ; Park, Changyoung ; Lee, Dukyong</creatorcontrib><description>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200331&DB=EPODOC&CC=US&NR=10607919B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200331&DB=EPODOC&CC=US&NR=10607919B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lee, Byoungok</creatorcontrib><creatorcontrib>Im, Seungwon</creatorcontrib><creatorcontrib>Lee, Yoonsoo</creatorcontrib><creatorcontrib>Son, Joonseo</creatorcontrib><creatorcontrib>Jeon, Oseob</creatorcontrib><creatorcontrib>Park, Changyoung</creatorcontrib><creatorcontrib>Lee, Dukyong</creatorcontrib><title>Semiconductor package having junction cooling pipes embedded in substrates</title><description>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAKTs3NTM7PSylNLskvUihITM5OTE9VyEgsy8xLV8gqzUsuyczPU0jOz88BCRRkFqQWK6TmJqWmpKSmKGTmKRSXJhWXFCWWpBbzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjUYqDRqXmpJfGhwYYGZgbmloaWTkbGxKgBAHE_NdY</recordid><startdate>20200331</startdate><enddate>20200331</enddate><creator>Lee, Byoungok</creator><creator>Im, Seungwon</creator><creator>Lee, Yoonsoo</creator><creator>Son, Joonseo</creator><creator>Jeon, Oseob</creator><creator>Park, Changyoung</creator><creator>Lee, Dukyong</creator><scope>EVB</scope></search><sort><creationdate>20200331</creationdate><title>Semiconductor package having junction cooling pipes embedded in substrates</title><author>Lee, Byoungok ; Im, Seungwon ; Lee, Yoonsoo ; Son, Joonseo ; Jeon, Oseob ; Park, Changyoung ; Lee, Dukyong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10607919B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lee, Byoungok</creatorcontrib><creatorcontrib>Im, Seungwon</creatorcontrib><creatorcontrib>Lee, Yoonsoo</creatorcontrib><creatorcontrib>Son, Joonseo</creatorcontrib><creatorcontrib>Jeon, Oseob</creatorcontrib><creatorcontrib>Park, Changyoung</creatorcontrib><creatorcontrib>Lee, Dukyong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, Byoungok</au><au>Im, Seungwon</au><au>Lee, Yoonsoo</au><au>Son, Joonseo</au><au>Jeon, Oseob</au><au>Park, Changyoung</au><au>Lee, Dukyong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor package having junction cooling pipes embedded in substrates</title><date>2020-03-31</date><risdate>2020</risdate><abstract>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US10607919B2 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor package having junction cooling pipes embedded in substrates |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T15%3A16%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Lee,%20Byoungok&rft.date=2020-03-31&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10607919B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |