Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells

Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells

Improved processes for manufacturing wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements ("NCEM") of fill cells that contain structures configured target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure mode...

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Bibliographische Detailangaben
Hauptverfasser: Vallishayee, Rakesh, Lee, Sherry, Liao, Marci, Weiland, Larg, Strojwas, Marcin, Ciplickas, Dennis, Michaels, Kimon, Rovner, Vyacheslav, Strojwas, Andrzej, Hess, Christopher, Matsuhashi, Hideki, Lam, Stephen, Fiscus, Timothy, Cheng, Jeremy, Comensoli, Simone, Brozek, Tomasz, Doong, Kelvin, Taylor, Carl, De, Indranil, Haigh, Jonathan, Kibarian, John, Rauscher, Markus, Yokoyama, Nobuharu, O'Sullivan, Conor, Eisenmann, Hans, Lin, Sheng-Che
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
HANDLING RECORD CARRIERS
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PRESENTATION OF DATA
RECOGNITION OF DATA
RECORD CARRIERS
SEMICONDUCTOR DEVICES
TESTING
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Beschreibung
Zusammenfassung:Improved processes for manufacturing wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements ("NCEM") of fill cells that contain structures configured target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes. Such processes may involve evaluating Designs of Experiments ("DOEs"), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).