Fan-out wafer level light-emitting diode package method and structure thereof
A fan-out wafer level light-emitting diode package method for packaging a plurality of light-emitting diode chips on a wafer protective film, the method comprising: forming a package surface layer on first electrodes of the light-emitting diode chips, and then forming a plurality of leading electrod...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A fan-out wafer level light-emitting diode package method for packaging a plurality of light-emitting diode chips on a wafer protective film, the method comprising: forming a package surface layer on first electrodes of the light-emitting diode chips, and then forming a plurality of leading electrodes electrically connected to the first electrodes on the package surface layer, cutting the light-emitting diode chips, sorting and testing as well as regrouping the light-emitting diode chips, covering sides of the light-emitting diode chips with a package layer, drilling and filling a conductive material on the package layer to form a plurality of common electrodes, and then printing a plurality of common electrical circuits, electrically connecting each of the common electrical circuits to one of the common electrodes and the leading electrodes, and finally covering with a circuit protection layer to complete the process. |
---|