Hardware description language specification translator

Disclosed approaches for translating a hardware description language (HDL) specification include inputting an HDL specification of a circuit design, generating a design graph of the circuit design from the HDL specification, and determining matches between modules of the HDL specification and blocks in a library. The design graph is translated into a data model that describes matching blocks, interfaces from the library, and connections between the blocks based on the matches determined between modules of the HDL specification and blocks of the library. The data model is compatible with a graphical design environment.