Semiconductor memory device having capping pattern defining top surface of air gap

A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed...

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Bibliographische Detailangaben
Hauptverfasser: Kim, Kwangmin, Lee, Ye-Ro, Song, Jungwoo, Hwang, Kwangtae, Kim, Jiyoung, Kim, Yong Kwan
Format: Patent
Sprache:eng
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Zusammenfassung:A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.