Processor to pre-empt voltage ramps for exit latency reductions

Processor to pre-empt voltage ramps for exit latency reductions

In one embodiment, a processor includes a plurality of cores and a power controller. This power controller in turn may include a voltage ramp logic to pre-empt a voltage ramp of a voltage regulator from a first voltage to a second voltage, responsive to a request for a second core to exit a low powe...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Alberts, Joseph M, Ambardekar, Ameya, Topper, Craig, Heit, Eric R, Ananthakrishnan, Avinash N, Suryanarayanan, Anupama, Shrall, Jeremy J
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:In one embodiment, a processor includes a plurality of cores and a power controller. This power controller in turn may include a voltage ramp logic to pre-empt a voltage ramp of a voltage regulator from a first voltage to a second voltage, responsive to a request for a second core to exit a low power state. Other embodiments are described and claimed.