Apparatus and methods for debugging on a host and memory device

The present disclosure includes apparatus and methods for debugging on a host and memory device. An example apparatus comprises a memory device having an array of memory cells. Sensing circuitry is coupled to the array. The sensing circuitry includes a sense amplifier and a compute component configured to perform logical operations on the memory device. A controller is coupled to the array and sensing circuitry to control performance of the logical operations. An interface is configured to receive a debugging indication and to cause the controller to halt a logical operation on the memory device.