Configurable hardware queue management and address translation

A system for managing one or more queues in a multi-processor environment includes a shared memory configured to be accessed by a plurality of processing elements, and a queue manager configured to control a queue in the shared memory, the queue manager storing dynamically configurable queue paramet...

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Bibliographische Detailangaben
Hauptverfasser: Grassi, Michael, Higgs, Raymond M, Bubb, Clinton E, Hopkins, Luke M, Pospesel, Kirk, Haynie, Howard M, Tarr, Gabriel M
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A system for managing one or more queues in a multi-processor environment includes a shared memory configured to be accessed by a plurality of processing elements, and a queue manager configured to control a queue in the shared memory, the queue manager storing dynamically configurable queue parameters including an operation address associated with the queue, a number of queue elements and a size of each queue element. The queue manager is configured to intercept a message from a processing element, the message directed to the shared memory and specifying the operation address, calculate an address of a location in the shared memory corresponding to one or more available queue elements, the calculating performed based on the operation address, the number of queue elements, and the size of each queue element, and perform one or more queuing operations on the queue based on the calculated address.