Lid attach optimization to limit electronic package warpage

An electronic package includes a carrier and a semiconductor chip. In a first aspect an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material.

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Bibliographische Detailangaben
Hauptverfasser:	Sikka, Kamal K, Iruvanti, Sushumna, Li, Shidong, Zitz, Jeffrey A, Toy, Hilton T
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	An electronic package includes a carrier and a semiconductor chip. In a first aspect an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material.