Memory block usage based on block location relative to array edge

A storage device includes storage circuitry and multiple memory blocks. The multiple memory blocks are arranged in an array, and each of the memory blocks includes multiple memory cells. A maximal number of programming cycles that a memory block of the multiple memory blocks sustains depends on a di...

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Bibliographische Detailangaben
Hauptverfasser: Guy, Roman, Tsohar, Michael, Baum, Barak, Shappir, Assaf, Shur, Yael
Format: Patent
Sprache:eng
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Zusammenfassung:A storage device includes storage circuitry and multiple memory blocks. The multiple memory blocks are arranged in an array, and each of the memory blocks includes multiple memory cells. A maximal number of programming cycles that a memory block of the multiple memory blocks sustains depends on a distance of the memory block from an edge of the array. The storage circuitry is configured to apply to the memory blocks programming cycles so that a number of programming cycles that can be applied to a respective memory block is based on a respective distance of the respective memory block from the edge of the array.