Linear masking circuits for side-channel immunization of advanced encryption standard hardware

Described is an apparatus comprising an S-box circuitry operable to convert a value on an input into a value on an output in accordance with an Advanced Encryption Standard (AES) Rijndael S-box matrix. The apparatus also comprises a pseudo-random number generation (PRG) circuitry operable to provide...

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Bibliographische Detailangaben
Hauptverfasser:	Satpathy, Sudhir K, Suresh, Vikram B, Kumar, Raghavan, Varna, Avinash L, Mathew, Sanu K
Format:	Patent
Sprache:	eng
Schlagworte:	ADVERTISING BASIC ELECTRONIC CIRCUITRY CODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHERPURPOSES INVOLVING THE NEED FOR SECRECY CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY INFORMATION STORAGE PHYSICS PULSE TECHNIQUE SEALS STATIC STORES TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	Described is an apparatus comprising an S-box circuitry operable to convert a value on an input into a value on an output in accordance with an Advanced Encryption Standard (AES) Rijndael S-box matrix. The apparatus also comprises a pseudo-random number generation (PRG) circuitry operable to provide a sequence of pseudo-random numbers on a first output and a registered copy of the sequence on a second output. The apparatus further comprises a mask circuitry operable to provide an XOR of a value on the output of the S box circuitry and a value on the first output of the PRG circuitry. The apparatus additionally comprises a mask removal circuitry operable to provide an XOR of a value on an output of the data register circuitry, a value coupled to an output of a key register circuitry, and a value on the second output of the PRG circuitry.