Semiconductor device including clock generating circuit and channel management circuit

A semiconductor device includes a first clock generating circuit including a first control circuit and a first clock gating circuit, a first channel management circuit which communicates with the first clock generating circuit according to a full handshake method, a second clock generating circuit i...

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Bibliographische Detailangaben
Hauptverfasser:	Lee, Jae Gon, Choi, Youn Sik, Kim, Ah Chan, Kim, Se Hun
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	A semiconductor device includes a first clock generating circuit including a first control circuit and a first clock gating circuit, a first channel management circuit which communicates with the first clock generating circuit according to a full handshake method, a second clock generating circuit including a second control circuit and a second clock gating circuit, and a second channel management circuit which communicates with the second clock generating circuit according to the full handshake method. The first clock gating circuit outputs a first clock, and the second clock gating circuit outputs a second clock different from the first clock.