Fan-out semiconductor package

A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first connection member disposed on an active surface of the semiconductor chip and including a redistribution layer electrically connected to the connectio...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Oh, Kyung Seob, Kim, Hyoung Joon, Harr, Kyoung Moo
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first connection member disposed on an active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip. The redistribution layer includes a line pattern having a first line portion having a first line width and a second line portion connected to the first line portion and having a second line width, greater than the first line width, a fan-in region is a projected surface of the semiconductor chip projected in a direction perpendicular to the active surface, a fan-out region is a region surrounding the fan-in region, and the second line portion at least passes through a boundary between the fan-in region and the fan-out region.