System and method for a low-power processing architecture
The present disclosure relates to a system and method for use in a digital signal processing environment. Embodiments may include a programmable processor configured to execute an instruction set that includes multiply instructions and/or multiply-accumulate instructions that generate a result in ca...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | The present disclosure relates to a system and method for use in a digital signal processing environment. Embodiments may include a programmable processor configured to execute an instruction set that includes multiply instructions and/or multiply-accumulate instructions that generate a result in carry-save format or redundant binary format. The instruction set may be executed at a single instruction, multiple data (SIMD) level. |
|---|