Method and structure for FinFET devices

Method and structure for FinFET devices

A semiconductor device includes a substrate, an isolation structure over the substrate, and at least one semiconductor layer over the substrate. A first portion of the at least one semiconductor layer is over the isolation structure and a second portion of the at least one semiconductor layer is sur...

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Hauptverfasser: Chen, Hou-Yu, Lu, Yong-Yan, Soong, Chia-Wei
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator Chen, Hou-Yu
Lu, Yong-Yan
Soong, Chia-Wei
description A semiconductor device includes a substrate, an isolation structure over the substrate, and at least one semiconductor layer over the substrate. A first portion of the at least one semiconductor layer is over the isolation structure and a second portion of the at least one semiconductor layer is surrounded by the isolation structure. A doped material layer is between the isolation structure and the second portion of the at least one semiconductor layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10157924B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10157924B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10157924B23</originalsourceid><addsrcrecordid>eNrjZFD3TS3JyE9RSMxLUSguKSpNLiktSlVIyy9ScMvMc3MNUUhJLctMTi3mYWBNS8wpTuWF0twMikBZZw_d1IL8-NTigsTk1LzUkvjQYEMDQ1NzSyMTJyNjYtQAAGr9J4c</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and structure for FinFET devices</title><source>esp@cenet</source><creator>Chen, Hou-Yu ; Lu, Yong-Yan ; Soong, Chia-Wei</creator><creatorcontrib>Chen, Hou-Yu ; Lu, Yong-Yan ; Soong, Chia-Wei</creatorcontrib><description>A semiconductor device includes a substrate, an isolation structure over the substrate, and at least one semiconductor layer over the substrate. A first portion of the at least one semiconductor layer is over the isolation structure and a second portion of the at least one semiconductor layer is surrounded by the isolation structure. A doped material layer is between the isolation structure and the second portion of the at least one semiconductor layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181218&amp;DB=EPODOC&amp;CC=US&amp;NR=10157924B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20181218&amp;DB=EPODOC&amp;CC=US&amp;NR=10157924B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Chen, Hou-Yu</creatorcontrib><creatorcontrib>Lu, Yong-Yan</creatorcontrib><creatorcontrib>Soong, Chia-Wei</creatorcontrib><title>Method and structure for FinFET devices</title><description>A semiconductor device includes a substrate, an isolation structure over the substrate, and at least one semiconductor layer over the substrate. A first portion of the at least one semiconductor layer is over the isolation structure and a second portion of the at least one semiconductor layer is surrounded by the isolation structure. A doped material layer is between the isolation structure and the second portion of the at least one semiconductor layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD3TS3JyE9RSMxLUSguKSpNLiktSlVIyy9ScMvMc3MNUUhJLctMTi3mYWBNS8wpTuWF0twMikBZZw_d1IL8-NTigsTk1LzUkvjQYEMDQ1NzSyMTJyNjYtQAAGr9J4c</recordid><startdate>20181218</startdate><enddate>20181218</enddate><creator>Chen, Hou-Yu</creator><creator>Lu, Yong-Yan</creator><creator>Soong, Chia-Wei</creator><scope>EVB</scope></search><sort><creationdate>20181218</creationdate><title>Method and structure for FinFET devices</title><author>Chen, Hou-Yu ; Lu, Yong-Yan ; Soong, Chia-Wei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10157924B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Chen, Hou-Yu</creatorcontrib><creatorcontrib>Lu, Yong-Yan</creatorcontrib><creatorcontrib>Soong, Chia-Wei</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Hou-Yu</au><au>Lu, Yong-Yan</au><au>Soong, Chia-Wei</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and structure for FinFET devices</title><date>2018-12-18</date><risdate>2018</risdate><abstract>A semiconductor device includes a substrate, an isolation structure over the substrate, and at least one semiconductor layer over the substrate. A first portion of the at least one semiconductor layer is over the isolation structure and a second portion of the at least one semiconductor layer is surrounded by the isolation structure. A doped material layer is between the isolation structure and the second portion of the at least one semiconductor layer.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method and structure for FinFET devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T19%3A28%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Chen,%20Hou-Yu&rft.date=2018-12-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10157924B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true