Integrated magnetic random access memory with logic device

Integrated magnetic random access memory with logic device

Integrating magnetic random access memory with logic is disclosed. The magnetic tunnel junction stack of a magnetic memory cell is disposed within a dielectric layer which serves as a via level of an interlevel dielectric layer with a metal level above the via level. An integration scheme for formin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Poh, Francis, Wang, Daxiang, Jiang, Yi, Zhang, Fan, Shum, Danny Pak-Chum, Tan, Juan Boon
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Integrating magnetic random access memory with logic is disclosed. The magnetic tunnel junction stack of a magnetic memory cell is disposed within a dielectric layer which serves as a via level of an interlevel dielectric layer with a metal level above the via level. An integration scheme for forming dual damascene structures for interconnects can be formed to logic and memory cells easily.