Discharge circuit and semiconductor memory device

A discharge circuit includes first and second transistors of a first polarity, third and fourth transistors of a second polarity, and first and second current sources having first ends electrically connected to first end of the third transistor and first end of the fourth transistor, respectively, and second ends supplied with a first voltage. First end of the first transistor is supplied with a second voltage higher than the first voltage. First end of the second transistor is electrically separated from the first end of the first transistor. Gate and second end of the first transistor, gate of the second transistor, and second end of the third transistor are electrically connected to one another. Second end of the second transistor, gate of the third transistor, and second end and gate of the fourth transistor are electrically connected to one another.