Clock generation with non-integer clock dividing ratio

A clock generator for generating a target clock with a frequency equal to the frequency of an input clock divided by a non-integer ratio is disclosed. The clock generator comprises a clock divider. The clock divider is configured to divide the input clock by a first dividing ratio during a first portion of a frame period to generate a first clock slower than the target clock, and divide the input clock by a second dividing ratio during a second portion of the frame period to generate a second clock faster than the target clock. A difference between the first dividing ratio and the second dividing ratio is 0.5 or 1. In some embodiments, the first dividing ratio and the second dividing ration are integers closest to the non-integer ratio.