RFID tag clock frequency reduction during tuning

An RFID IC may operate at a relatively low clock frequency while impedance matching to an antenna is being tuned to increase the amount of power that the IC can extract from an incident RF wave. A tuning circuit tunes the impedance matching by adjusting a variable impedance coupling the IC and the a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Heinrich, Harley, Srinivas, Shailendra, Kuhn, Jay, Diorio, Christopher J, Oliver, Ronald A, Hyde, John D, Stanford, Theron
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:An RFID IC may operate at a relatively low clock frequency while impedance matching to an antenna is being tuned to increase the amount of power that the IC can extract from an incident RF wave. A tuning circuit tunes the impedance matching by adjusting a variable impedance coupling the IC and the antenna. The IC may power-up with a low clock frequency or reduce its current clock frequency to a lower clock frequency prior to tuning or during the tuning process, and may increase its clock frequency upon completion of tuning or during the tuning process.