CELL FOR PERFORMING MATHEMATICAL OPERATIONS ON NUMBERS WITH A VARIABLE ABSOLUTE VALUE

The proposed cell for performing mathematical operations on numbers with a variable absolute value contains a unit for generating a carry bit to a high-order digit when adding and subtracting numbers in two's complement code, a unit for generating a borrow bit from a high-order digit when subtracting numbers, a unit for generating borrow bit from a high-order digit when adding and subtracting numbers in two's complement code, a unit for generating a signal at equity of two numbers, a unit for generating a signal at positive-sign inequity of two numbers, a modulo-two adder with four inputs, a modulo-two adder with three inputs, an OR logic element, a NOT logic element, and three AND logic elements. The proposed cell differs in that, owing tocomplication of the structural diagram, the cell provides for generating, directly in the cell, carry bits to a high-order digit and borrow bits from a high-order digit when subtracting and adding numbers, as well as generating signals that characterize results of comparison of numbers.