COMPUTER-AIDED SYSTEM FOR PARAMETRIC TESTING
The computer-aided system for parametric testing comprises a unit under test, a memory block, a comparison circuit, an output bus, a parameter number select input, a signal input of measurement end, a operating mode setting input, two binary counters, a pulse generator, H modulating transducers, H c...
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Format: | Patent |
Sprache: | eng ; rus ; ukr |
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Zusammenfassung: | The computer-aided system for parametric testing comprises a unit under test, a memory block, a comparison circuit, an output bus, a parameter number select input, a signal input of measurement end, a operating mode setting input, two binary counters, a pulse generator, H modulating transducers, H converters, two multiplexers a decoder, H flip-flops, the second comparison circuit, an OR element, an AND element, a delay element, a pulse shaper, an indicating unit where i- modulating transducer outputs to i-converter input are connected, the output being connected to i-information input of the first multiplexer, the parameter number select input is connected with a pulse shaper input, the output being connected to an inverting input of the first binary counter, the outputs being connected with indicating unit inputs and the first group of information inputs of the second multiplexer, a pulse generator output is connected to an inverting input of the second binary counter and through a delay element is connected with the first AND element input, the outputs of the second binary counter are connected to the second group of information inputs of the second multiplexer, a operation mode setting input is connected to an address input of the second multiplexer, the outputs being connected to decoder inputs and address inputs of the first multiplexer and a memory block, the first multiplexer outputs are connected to the first groups of comparison circuit inputs, the first group of memory block outputs are connected to the second group of the first comparison circuit inputs, the second group of comparison of memory block outputs are connected to the second group of comparison circuit inputs, the comparison circuit outputs are connected to OR element inputs, the output being connected to the second AND input, the measurement end signal input is connected to the third AND element input, the output being connected to flip-flop record inputs, i-decoder output is connected to an i-flip-flop data input, the output being connected to i-charge of an output bus (H - number of parameters). The system comprises also a threshold element, a front detector, an information output, where the measurement end signal input with flip-flop reset inputs is connected, the outputs being connected to threshold element inputs, the threshold element output is connected to an information output.
Автоматизована система параметричного контролю містить об'єкт контролю, блок пам'яті, схему порівня |
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