Computer system and memory management method based on wafer-on-wafer architecture

A computer system based on wafer-on-wafer architecture can replace static memory with low-cost dynamic memory to realize cache function in high-speed operation. The computer system comprises at least a first memory wafer layer and a logic circuit stacked to form a wafer stack. The first memory wafer layer comprises at least a first memory and a second memory. A first performance characteristic of the first memory is different from a second performance characteristic of the second memory. The logic circuit layer comprises at least one logic circuit. The logic circuit connects the first memory and the second memory, and uses the first memory and the second memory to execute a logic expression. The logic circuit comprises at least an operation unit and a performance manager. The operation unit comprises a plurality of operation gates for executing the logical expression. The performance manager connects the operation gates, and can connect the input or output of the operation gates to the first memory or the sec