Wafer non-uniformity tweaking through localized ion enhanced plasma (iep)

semiconductor processing chambers include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures. The chambers may include a faceplate positioned b...

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Bibliographische Detailangaben
Hauptverfasser: KULKARNI, MAYUR GOVIND, DHANAKSHIRUR, AKSHAY, MUTYALA, MADHU SANTOSH KUMAR, PEMMASANI, SAKETH, PAUL, KHOKAN CHANDRA
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:semiconductor processing chambers include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures. The chambers may include a faceplate positioned between the blocker plate and the substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface and the substrate support may at least partially define a processing region within the chamber. The faceplate may define an inner plurality of apertures. Each of the inner apertures may include a generally cylindrical aperture profile. The faceplate may define an outer plurality of apertures that are positioned radially outward from the inner apertures. Each of the outer apertures may include a conical aperture profile that extends through the second surface.