TWI812962B

A semiconductor device for controlling memory cell transistors includes a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type that electrically separates the first well from the substrate therein and includes a first portion surrounding...

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Bibliographische Detailangaben
Hauptverfasser: SHIMURA, MASAHIRO, NOGUCHI, MITSUHIRO
Format: Patent
Sprache:chi
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Beschreibung
Zusammenfassung:A semiconductor device for controlling memory cell transistors includes a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type that electrically separates the first well from the substrate therein and includes a first portion surrounding the first well, and a second portion facing a bottom portion of the first well and having a side surface contacting a side surface of the first portion, a third well of the first conductivity type in the substrate, the third well surrounding the first portion of the second well with being separated therefrom, and a first transistor that includes a gate electrode facing the first well via a first insulating film. A bottom surface of the first portion of the second well is closer to a surface of the substrate than a bottom surface of the second portion of the second well.