Insulated gate semiconductor device and method for fabricating a region of the insulated gate semiconductor device

The present embodiments provide a region of a semiconductor device comprising a plurality of power transistor cells configured as trench MOSFETs in a semiconductor substrate. At least one active power transistor cell further includes a trenched source region wherein a trench bottom surface of the trenched source contact is covered with an insulation layer and layer of a conductive material on top of the insulation layer, to function as an integrated pseudo Schottky barrier diode in the active power transistor cell.