CONTROL CIRCUIT AND METHOD FOR DETECTING GLITCH SIGNAL OF BUS

A control circuit and method for detecting a glitch signal on a bus are provided. The control circuit includes: input ends, respectively receiving a data signal and a clock signal from the bus; a counter, for calculating a time or a number of times in a low level period of the clock signal; a comparator, receiving an output of the time counted by the counter and a threshold value, and generating a comparison result by comparing the time and the threshold value; and an error detector, coupled to the comparator to receive the comparison result, and generating an error flag. When the comparison result indicates that there is a level change during the low level period of the clock signal, the error detector generates an error flag.