Memeory structure and manufacturing method thereof

A memory structure including a substrate, a stack structure, a first silicon oxide liner layer, and isolation structures is provided. The stack structure is disposed on the substrate. The stack structure includes a first dielectric layer and a floating gate. The first dielectric layer is located between the floating gate and the substrate. The first silicon oxide liner layer is disposed on the sidewall of the stack structure. The isolation structures are located in the substrate. The stack structure is located between two adjacent isolation structures. The isolation structure covers the sidewall of the first silicon oxide liner layer. The top surface of the first silicon oxide liner layer is higher than the top surface of the first dielectric layer, and the bottom surface of the first silicon oxide liner layer is lower than the bottom surface of the first dielectric layer and higher than the bottom surface of the isolation structure.