Computer system based on wafer-on-wafer architecture and memory test method

The invention discloses a computer system based on a wafer stacking framework and a memory testing method. The memory testing method is suitable for a computer system based on a wafer stacking framework. The computer system is a stereoscopic wafer product formed by a memory crystal layer, a logic circuit layer and a substrate. When memory testing is carried out, a memory device in a memory crystal layer is divided into a plurality of memory sub-blocks, and the memory sub-blocks are tested respectively. A data table is first established in a memory sub-block. Providing a plurality of different initial values prepared in advance, performing proof-of-work operation, and performing multiple times of reading and writing on the data table to generate a plurality of operation results corresponding to each initial value; and the judgment module obtains the operation results from the operation module and compares the operation results with corresponding known solutions, so that the error rate of the sub-blocks of the