System and method for generation of wafer inspection critical areas

System and method for generation of wafer inspection critical areas

A method includes receiving one or more sets of wafer data, identifying one or more primitives from one or more shapes in one or more layers in the one or more sets of wafer data, classifying each of the one or more primitives as a particular primitive type, identifying one or more primitive charact...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KULKARNI, ASHOK V, MANEPALLI, RAJESH, UPPALURI, PRASANTI, KIRKLAND, JOHN, BANERJEE, SAIBAL
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES
MEASURING
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Beschreibung
Zusammenfassung:A method includes receiving one or more sets of wafer data, identifying one or more primitives from one or more shapes in one or more layers in the one or more sets of wafer data, classifying each of the one or more primitives as a particular primitive type, identifying one or more primitive characteristics for each of the one or more primitives, generating a primitive database of the one or more primitives, generating one or more rules based on the primitive database, receiving one or more sets of design data, applying the one or more rules to the one or more sets of design data to identify one or more critical areas, and generating one or more wafer inspection recipes including the one or more critical areas for an inspection sub-system.