EVALUATING A HOLE FORMED IN AN INTERMEDIATE PRODUCT

An evaluation system that may include an imager; and a processing circuit. The imager may be configured to obtain an electron image of a hole that is formed by an etch process, the hole exposes at least one layer of a one or more sets of layers, each set of layers comprises layers that differ from e...

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Bibliographische Detailangaben
Hauptverfasser:	RATHORE, DHANANJAY SINGH, GEVA, JANNELLE ANNA, FRIEDLER, IDO, SHAMIR, ASSAF, ROGERS, DANIEL ALAN, SOMMER, ELAD, KRIS, ROMAN, DUVDEVANI-BAR, SHARON, SIMHON, AVI AVIAD BEN, FRISHMAN, EINAT, KLEBANOV, GRIGORY
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING PHYSICS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	An evaluation system that may include an imager; and a processing circuit. The imager may be configured to obtain an electron image of a hole that is formed by an etch process, the hole exposes at least one layer of a one or more sets of layers, each set of layers comprises layers that differ from each other by their electron yield and belong to an intermediate product. The processing circuit may be configured to evaluate, based on the electron image, whether the hole ended at a target layer of the intermediate product. The intermediate product is manufactured by one or more manufacturing stages of a manufacturing process of a three dimensional NAND memory unit. The hole may exhibit a high aspect ratio, and has a width of a nanometric scale.