Apparatus for configuring impedance of a memory interface

The invention provides an impedance configuration method of a memory interface, which is executed by a processing unit and comprises the following steps of: setting a first resistance value of an in-chip termination resistor associated with a first receiver as a first default resistance value; setting a second resistance value of a driving variable resistor associated with a second transmitter asa second default resistance value; executing a test for a plurality of test combinations, each combination comprising a third resistance value associated with the driving variable resistor of the first transmitter and a fourth resistance value associated with the in-chip termination resistor of the second receiver; and storing the test result of each test combination to a specific position of thestatic random access memory, so that the calibration host can obtain the test result of each test combination from the static random access memory and determine the impedance setting of the memory interface according to the te