Power overlay structure and method of making same

A power overlay (POL) structure (40) includes a POL sub-module (42). The POL sub-module includes a dielectric layer (48) and a semiconductor device (44,45) having a top surface (96) attached to the dielectric layer (48). The top surface of the semiconductor device (44,45) has at least one contact pa...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MCCONNELEE, PAUL ALAN, GOWDA, ARUN VIRUPAKSHA, CHAUHAN, SHAKTI SINGH
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A power overlay (POL) structure (40) includes a POL sub-module (42). The POL sub-module includes a dielectric layer (48) and a semiconductor device (44,45) having a top surface (96) attached to the dielectric layer (48). The top surface of the semiconductor device (44,45) has at least one contact pad (58) formed thereon. The POL sub-module (42) also includes a metal interconnect structure (54) that extends through the dielectric layer (48) and is electrically coupled to the at least one contact pad (58) of the semiconductor device (44,45). A conducting shim (60) is coupled to a bottom surface of the semiconductor device (44,45) and a first side of a thermal interface (68) is coupled to the conducting shim (60). A heat sink (66) is coupled to a second side of the electrically insulating thermal interface (68).