Method for forming semiconductor structure

The present invention provides a semiconductor process, the process including: firstly, a substrate comprising a plurality of gate structures is provided, followed by forming a first dielectric layer on the substrate, and each of the gate structures being located on the substrate in a first dielectric layer, and then sequentially forming a second dielectric layer and a third dielectric layer on the first dielectric layer, and the third dielectric layer having a non-planar top surface. A planarization process is then performed, to remove a portion of the third dielectric layer, a portion of the second dielectric layer, a portion of the first dielectric layer, and part of the gate structure.