MEMORY SYSTEM AND SENSING DEVICE

A memory system (10) with low read power includes a first memory bank (MBA), a first path selector (YP1), a second memory bank (MBB), a second path selector (YP2), and a sensing device (100). The first path selector (YP1) is coupled to the memory cells in the first memory bank (MBA) through a plural...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: WU, POING
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator WU, POING
description A memory system (10) with low read power includes a first memory bank (MBA), a first path selector (YP1), a second memory bank (MBB), a second path selector (YP2), and a sensing device (100). The first path selector (YP1) is coupled to the memory cells in the first memory bank (MBA) through a plurality of first bit lines (BLA1 to BLAN). The second path selector (YP2) is coupled to the second memory cells in the second memory bank (MBB) through a plurality of second bit lines (BLB1 to BLBN). The sensing device (100) is coupled to the output terminals of the first bank selector (YP1) and the second bank selector (YP2). By sharing the sensing device (100) to sense the read currents of the corresponding memory cells, the memory system (10) is able to perform read operation with low power.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TWI630621BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TWI630621BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TWI630621BB3</originalsourceid><addsrcrecordid>eNrjZFDwdfX1D4pUCI4MDnH1VXD0c1EIdvUL9vRzV3BxDfN0duVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfEh4Z5mxgZmRoZOTsZEKAEAwb0h7Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MEMORY SYSTEM AND SENSING DEVICE</title><source>esp@cenet</source><creator>WU, POING</creator><creatorcontrib>WU, POING</creatorcontrib><description>A memory system (10) with low read power includes a first memory bank (MBA), a first path selector (YP1), a second memory bank (MBB), a second path selector (YP2), and a sensing device (100). The first path selector (YP1) is coupled to the memory cells in the first memory bank (MBA) through a plurality of first bit lines (BLA1 to BLAN). The second path selector (YP2) is coupled to the second memory cells in the second memory bank (MBB) through a plurality of second bit lines (BLB1 to BLBN). The sensing device (100) is coupled to the output terminals of the first bank selector (YP1) and the second bank selector (YP2). By sharing the sensing device (100) to sense the read currents of the corresponding memory cells, the memory system (10) is able to perform read operation with low power.</description><language>chi ; eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180721&amp;DB=EPODOC&amp;CC=TW&amp;NR=I630621B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180721&amp;DB=EPODOC&amp;CC=TW&amp;NR=I630621B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WU, POING</creatorcontrib><title>MEMORY SYSTEM AND SENSING DEVICE</title><description>A memory system (10) with low read power includes a first memory bank (MBA), a first path selector (YP1), a second memory bank (MBB), a second path selector (YP2), and a sensing device (100). The first path selector (YP1) is coupled to the memory cells in the first memory bank (MBA) through a plurality of first bit lines (BLA1 to BLAN). The second path selector (YP2) is coupled to the second memory cells in the second memory bank (MBB) through a plurality of second bit lines (BLB1 to BLBN). The sensing device (100) is coupled to the output terminals of the first bank selector (YP1) and the second bank selector (YP2). By sharing the sensing device (100) to sense the read currents of the corresponding memory cells, the memory system (10) is able to perform read operation with low power.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFDwdfX1D4pUCI4MDnH1VXD0c1EIdvUL9vRzV3BxDfN0duVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfEh4Z5mxgZmRoZOTsZEKAEAwb0h7Q</recordid><startdate>20180721</startdate><enddate>20180721</enddate><creator>WU, POING</creator><scope>EVB</scope></search><sort><creationdate>20180721</creationdate><title>MEMORY SYSTEM AND SENSING DEVICE</title><author>WU, POING</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TWI630621BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2018</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>WU, POING</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WU, POING</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMORY SYSTEM AND SENSING DEVICE</title><date>2018-07-21</date><risdate>2018</risdate><abstract>A memory system (10) with low read power includes a first memory bank (MBA), a first path selector (YP1), a second memory bank (MBB), a second path selector (YP2), and a sensing device (100). The first path selector (YP1) is coupled to the memory cells in the first memory bank (MBA) through a plurality of first bit lines (BLA1 to BLAN). The second path selector (YP2) is coupled to the second memory cells in the second memory bank (MBB) through a plurality of second bit lines (BLB1 to BLBN). The sensing device (100) is coupled to the output terminals of the first bank selector (YP1) and the second bank selector (YP2). By sharing the sensing device (100) to sense the read currents of the corresponding memory cells, the memory system (10) is able to perform read operation with low power.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_TWI630621BB
source esp@cenet
subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title MEMORY SYSTEM AND SENSING DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T16%3A25%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WU,%20POING&rft.date=2018-07-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETWI630621BB%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true