Memory system controller including a multi-resolution internal cache

A memory system comprising a non-volatile memory and a controller in communication with the non-volatile memory is disclosed. The controller may include a central processing unit ("CPU") and an internal cache in communication with the CPU via a plurality of cache lines. The CPU is configur...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WEINBERG, YOAV, FITERMAN, MARK, DROR, ITAI
Format: Patent
Sprache:chi ; eng
Schlagworte:
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