TWI610314B

TWI610314B

According to one embodiment, a semiconductor integrated device includes a first node that receives a first voltage, a second node that receives a second voltage, and an electrode. A PMOS transistor is coupled between the first node and the electrode. An NMOS transistor is coupled between the second...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: SHIMIZU, YUUI
Format: Patent
Sprache:chi
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:According to one embodiment, a semiconductor integrated device includes a first node that receives a first voltage, a second node that receives a second voltage, and an electrode. A PMOS transistor is coupled between the first node and the electrode. An NMOS transistor is coupled between the second node and the electrode. A control signal at a voltage lower than the second voltage is supplied to a gate electrode of the PMOS transistor. A control signal at a voltage higher than the first voltage is supplied to a gate electrode of the NMOS transistor.