Through process flow intra-chip and inter-chip electrical analysis and process control using in-line nanoprobing

A method for probing a semiconductor device under test (DUT) using a combination of scanning electron microscope (SEM) and nanoprobes, by: obtaining an SEM image of a region of interest (ROI) in the DUT; obtaining a CAD design image of the ROI; registering the CAD design image with the SEM image to identify contact targets; obtaining a Netlist corresponding to the contact targets and using the Netlist to determine which of the contact targets should be selected as test target; and, navigating nanoprobes to land a nanoprobe on each of the test targets and form electrical contact between the nanoprobe and the respective test target.