Apparatus and method for memory-hierarchy aware producer-consumer instruction

An apparatus and method are described for efficiently transferring data from a producer core to a consumer core within a central processing unit (CPU). For example, one embodiment of a method comprises: A method for transferring a chunk of data from a producer core of a central processing unit (CPU)...

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Bibliographische Detailangaben
Hauptverfasser: MANDELBLAT, JULIUS YULI, RAIKIN, SHLOMO, VALENTINE, ROBERT, SADE, RAANAN, SHALEV, RON
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:An apparatus and method are described for efficiently transferring data from a producer core to a consumer core within a central processing unit (CPU). For example, one embodiment of a method comprises: A method for transferring a chunk of data from a producer core of a central processing unit (CPU) to consumer core of the CPU, comprising: writing data to a buffer within the producer core of the CPU until a designated amount of data has been written; upon detecting that the designated amount of data has been written, responsively generating an eviction cycle, the eviction cycle causing the data to be transferred from the fill buffer to a cache accessible by both the producer core and the consumer core; and upon the consumer core detecting that data is available in the cache, providing the data to the consumer core from the cache upon receipt of a read signal from the consumer core.