Dynamic method and circuit for limiting the reversebase-emitter voltage of a transistor
In a circuit having two input stages multiplexed to a common output stage having an output, one of the two input stages including transistor having a base, a collector and an emitter; a method of protecting the transistor from mu-degradation when the one of the two input stages is disabled comprises...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | In a circuit having two input stages multiplexed to a common output stage having an output, one of the two input stages including transistor having a base, a collector and an emitter; a method of protecting the transistor from mu-degradation when the one of the two input stages is disabled comprises: clamping the base to a substantially fixed voltage for a first range of voltages applied to the one of the two input stages; and bootstrapping the base to a voltage that follows the output for a second range of voltages applied to the one of the two input stages. Alternatively, a method of protecting a transistor having a base connected through a finite impedance to an input voltage, a collector and an emitter, may comprise bootstrapping the base to a voltage that follows the input voltage with an offset when the input voltage is within a second range of voltages. A circuit having an input voltage connected thereto through a finite impedance may comprise: a transistor having a base, a collector and an emitter; a |
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