Pulse processing circuit and frequency multiplier circuit

PMOS transistors P1-Pn and PMOS transistors P1'-Pn' are respectively connected in series between a supply voltage terminal VD and output terminals OUTB, while NMOS transistors N1-Nn and NMOS transistors N1'-Nn' are respectively connected in series between the output terminals OUT...

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Bibliographische Detailangaben
1. Verfasser: KANZAKI, MINORU
Format: Patent
Sprache:eng
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