Program method and circuit of non-volatile memory

A circuit of non-volatile memory which includes a plurality of memory units is disclosed. The memory unit comprises a first switch, a second switch, a data line, and a plurality of cascade memory components. The first terminal of the first switch is coupled to the second voltage. The data line is coupled to the second terminal of the first switch. The first terminal of the second switch is coupled the data line. In addition, the third terminal of each memory component is coupled to the first terminal of the next memory component, and the second terminal of the each memory component is coupled to a second voltage.