Semiconductor device having integrated capacitor structure and its manufacturing method
The present invention is related to a semiconductor device. On the intrinsic semiconductor substrate, an insulation layer is formed, and a capacitor structure (K) is formed in the insulation layer. The capacitor structure (K) at least has two metal layers (1--7), which are disposed parallel to each...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The present invention is related to a semiconductor device. On the intrinsic semiconductor substrate, an insulation layer is formed, and a capacitor structure (K) is formed in the insulation layer. The capacitor structure (K) at least has two metal layers (1--7), which are disposed parallel to each other and are respectively connected to one connection line. At least one conduction region (1a--1j, 2a--2j, 31a--36a, 41a--46a, 5a--5f) for forming capacitor surface is disposed between the metal layers (1--7), and the conduction region (1a--1j, 2a--2j, 31a--36a, 41a--46a, 5a--5f) forms an electrically conductive connection with only one metal layer of the metal layers (1--7). |
---|