Nonvolatile memory device suitable for cache memory

Peripheral circuitry writes/reads input data and output data of L bits (L: integer of at least 2) that is input/output to/from a data node into/from first and second memory cell blocks that are selectively accessed. The peripheral circuitry uses circuit components operating in response to a clock signal to write/read the data by dividing the data writing operation/data reading operation into a plurality of stages and carrying out them in pipelining manner.