Linked-list memory-access control for a concentrator

A microprocessor system employs a linked-list structure for a direct memory-access controller to service requests by one or more data pumps. Such direct memory-access controller may be termed a linked-list, direct memory-access controller (LLDMAC). The central microprocessor periodically polls, e.g., a status register in each data pump to determine which data pumps to service. Using information from each status register, the central microprocessor programs the LLDMAC and corresponding locations of system memory buffers in the microprocessor system allocated to each data pump for service. The central microprocessor programs the LLDMAC and corresponding locations of system memory buffers such that a chain linking addresses of each data pump to service, termed a linked chain, is formed by the pointer information stored in the system memory buffers. Once the linked chain to address data pumps for service is formed, the central microprocessor causes the LLDMAC to begin the data transfer for the first data pump service of the linked chain, and then returns to other processing tasks. The LLDMAC transfers the data between system memory and the data pumps for each service in the chain, and then indicates to the central microprocessor when the services of the linked chain are complete.