Sti pull-down to control SiGe facet growth

An SiGe bipolar transistor including a semiconductor substrate having a collector and sub-collector region formed therein, wherein the collector and sub-collector are formed between isolation regions that are also present in the substrate is provided. Each isolation region includes a recessed surfac...

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Bibliographische Detailangaben
Hauptverfasser: GALLAGHER, MATTHEW D, PHILIPS, BRETT A, COOLBAUGH, DOUGLAS DUANE, DUPUIS, MARK D, GEISS, PETER J
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:An SiGe bipolar transistor including a semiconductor substrate having a collector and sub-collector region formed therein, wherein the collector and sub-collector are formed between isolation regions that are also present in the substrate is provided. Each isolation region includes a recessed surface and a non-recessed surface which are formed utilizing lithography and etching. An SiGe layer is formed on the substrate as well as the recessed non-recessed surfaces of each isolation region, the SiGe layer includes polycrystalline Si regions and an SiGe base region. A patterned insulator layer is formed on the SiGe base region; and an emitter is formed on the patterned insulator layer and in contact with the SiGe base region through an emitter window opening.