Apparatus and method for performing conditional calculations

A tester is able to perform complex conditional calculations within a single vector cycle. The tester has arithmetic elements 24 to perform calculations, each arithmetic element including, among other things, an arithmetic logic unit of conventional design. Status flags 306 within the tester reflect a current state of the tester. Execution of an instruction 370, 372 to one or more of the arithmetic elements 302 may be conditioned upon one of the status flags 306. One of the status flags 306 is chosen by a status flag selector 360 based upon a programmed condition 364. The chosen status flag 306 is used to determine which one of first and second alternative instructions 370, 372 is chosen for presentation as an output of an instruction selector 368 to the arithmetic element 302. A tester includes a method for performing conditional calculations within a single test vector cycle that first generates status flags 306 reflecting a current status of the tester. One of said status flags 306 is selected as an instruction select 366. First and second alternative instructions are presented to an instructions selector 368 and the instruction select 366 determines which one of the first and second instructions is selected for execution by an arithmetic unit 302.